The demonstration of nonlinear analytic model for the strain field induced by thermal copper filled TSVs (through silicon via)
Passive Equalizer Design for Through Silicon Vias with Perfect Compensation
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RF characterization and modelling of high density Through Silicon Vias for 3D chip stacking - ScienceDirect
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Modelling of through silicon via and devices electromagnetic coupling - ScienceDirect
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The reduction of keep-out zone (∼10×) by the optimized novel trench structures near the through silicon vias for the applicat
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3D Integration | SpringerLink
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63rd ECTC Final Program by ECTC - Issuu
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Parasitic effects of air-gap through-silicon vias in high-speed three-dimensional integrated circuits
